UDK 629.7.05.03
SATELLITE-BORNE MICROPROCESSOR CONTROL SYSTEM WITH IMPROVE UPSET TOLERANCE
D. V. Udalov
SC “Scientific&Industrial Centre “Polyus” 56v, Kirov Av., Tomsk, 634050, Russian Federation E-mail: polus@online.tomsk.net
Modern innovative trends in the development of space equipment are associated with the use of microprocessor technology in onboard hardware. Therefore, control systems, direct control of the device based on internal algorithms are introduced as the parts of the equipment microprocessor. That allows you to go to a distributed control principle on board the spacecraft, which is based on the idea of the localization of the control functions on board, inside the devices themselves. In particular, the establishment of a power processing unit of the new generation for electric propulsion system in SC “Scientific&Industrial Centre “Polyus” (Tomsk) developed satellite-borne microprocessor digital interface and control unit, by integrating in which said system is not only able to improve weight and overall dimensions but also to expand functionalities. However, the growth requirements for space vehicles in general leads to the need to improve onboard microprocessor control system.These requirements are not possible without the use of modern integrated circuits with very large-scale integration level produced by nanometer technology standards. It is known that such schemes are made of submicron technology, unlike micron are more sensitive to single effects caused by exposure to heavy charged particles of space, which, in turn, necessitates the adoption of a number of special measures to ensure the stability of control systems. This article discusses the ways to increase upset immunity microprocessor control systems onboard equipment spacecraft. The ways of solving the problems associated with the selection of electronic components, circuit design and architectural solutions for resistance to single effects caused by heavy charged particles of space are shown. We offer to implement the architecture of a microprocessor control system with advanced features, high performance and enhanced upset immunity.
spacecraft, satellite-borne microprocessor control system, very large scale integrated circuits, heavy charged particles, upset tolerance, single event effects
References
  1. Ermoshkin U. M. Osnovy teorii i rascheta elektroreaktivnykh dvigatelnykh ustanovok [Fundamentals of the theory and calculation of electric propulsion systems]. Krasnoyarsk, SibGAU Publ., 2003, 159 p.
  2. Udalov D. V., Puxtiy S. B., Sednev U. S. [The onboard microprocessor subsystem management for electric propulsion system]. Elektronnye i elektromekhanicheskie sistemy i ustroystva. Sb. nauch. tr. [Electronic and electromechanical systems and device. Collection of scientific papers]. JSC “SIC “Polyus”. Tomsk, 2011, p. 139−147 (In Russ.).
  3. Santarini M. Cosmic radiation comes to ASIC and SOC design. EDN. 5/12/2005. Available at: http://edn. com/article/CA529381.html (accessed 20.12.2013).
  4. Filipchuk E. V., Paxomov S. I. Teoriya informatsii i pomekhoustochivoe kodirovanie. [Information Theory and noiseless coding]. Мoscow, MIFI Publ., 1989, 118 p.
  5. Hsiao M. Y. A Class of Optimal Minimum Odd-Weight-Column SEC-DED Codes. IBM J. Res. Develop. 1970, vol. 14, p. 395−401.
  6. Xemming R. V. Chislennye metody. [Numerical methods]. Мoscow, Nauka Publ., 1972, 400 p.
  7. GOST R 52070‑2003. Interfeys magistral'noy posledovatel'noy sistemy elektronnykh moduley. [State Standard R 52070-2003. Serial interface trunk system of electronic modules]. Moscow, Standardinform Publ., 2003 (In Russ.).
  8. Telec V., Cybin S., Bystrickiy A., Podyapolskiy S. [FPGAs for space applications. Architectural and circuit features]. Elektronika: nauka, tekhnologiya, biznes. 2005, no. 6, p. 44–48 (In Russ.).
  9. Krasnyk A. A, Petrov K. A. [Features of the application error-correcting coding in the sub-100 nm memory chips for space systems]. Mikroelektronika. 2012, vol. 41, no. 6, p. 450–456 (In Russ.).
  10. Yudintsev V. [Radiation-resistant integrated circuit. Reliability in space and on the ground]. Elektronika: Nauka, tekhnologiya, biznes. 2007, no. 5, p. 72–77 (In Russ.).
  11. Donald C. Mayer, Ronald C. Lacoe. Designing Integrated Circuits to Withstand Space Radiation. Vol. 4, no. 2. Available at http://aero.org/publications/crosslink/ summer2003/06.html (accessed 20.05.2014).
  12. ECSS-E-50-12C. SpaceWire – Links, nodes, routers and networks. European Cooperation for Space Standardization (ECSS), 2008.
  13. SPI Block Guide V03.06, FreeScale Semiconductor. Available at: http://freescale.com/files/ microcontrollers/doc/ref_manual/S12SPIV3.pdf (accessed 20.05.2014).
  14. MICROWIRE™ Serial Interface. National Semiconductor Application Note 452, Abdul Aleaf, Jan. 1992. Available at: http://national.com/an/AN/AN-452.pdf (accessed 20.05.2014).
  15. Romanko Th., Clegg B. SOI eases radiation-hardened ASIC design. Available at: http://eetimes.com/ showArticle.jhtml?articleID=165700727 (accessed 20.05. 2014).
  16. Calin T., Nicolaidis M., Velazco R. Upset hardened memory design for submicron CMOS technology. IEEE Transactions on Nuclear Science. 1996. Vol. 43(6), p. 2874–2878.

Udalov Dmitry Vladimirovich – postgraduate student, senior design engineer, SC “Scientific&Industrial Centre “Polyus”. E-mail: mr.udv@mail.ru