UDK 004.056.55
FPGA IMPLEMENTATION OF THE ZAKREVSKIJ'S CIPHER BASED ON RECONFIGURABLE FSM
D. S. Kovalev
JSC "Information satellite system” named after academician M. F. Reshetnev" 52, Lenin str., Zheleznogorsk, Krasnoyarsk region, 662972, Russian Federation E-mail: dmisk@hotmail.com
The problem of the compact high-throughput cryptoprocessor design is considered. This problem solution based on the Finite State Machine model is offered. Zakrevskij's Cipher Based on Reconfigurable FSM is chosen as a representative of the finite automata ciphers class. FPGA Xilinx Spartan-3 hardware implementation of this cipher is presented. Values of the hardware resource using and throughput of this implementation are given. The FPGA implementation comparison of Zakrevskij's Cipher Based on Reconfigurable FSM, block cipher AES and hardware-oriented stream ciphers became eSTREAM competition finalists was made. The conclusion about Zakrevskij's Cipher Based on Reconfigurable FSM practice using possibility is made.
cryptoprocessor, FPGA, finite automata cryptosystem, Zakrevskij’s cipher, reconfigurable finite state machine.
References
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- Hwang D., Chaney M., Karanam S., Ton N., Gaj K. Comparison of FPGA-targeted hardware implementations of eSTREAM stream cipher candidates. SASC 2008 Workshop Record. eSTREAM Project, 2008, p. 151–162.
Kovalev Dmitry Sergeevich – software engineer, JSC “Information satellite system” named after academician M. F. Reshetnev, graduate student of the Information Security and Cryptography Department, National Research Tomsk State University. Email: dmisk@hotmail.com
